Dr. Paul Comiskey

Creative Technologies

Dr. Paul Comiskey

e mail: paul.comiskey@iadt.ie
phone: 01 2144733

Qualifications and Professional Bodies

PhD, Trinity College Dublin, in CMOS Power Estimation for VLSI Systems

M.Eng.Sc. at the National Microelectronics Research Centre (NMRC), University College Cork

B.A. B.A.I., Trinity College Dublin.

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Teaching and Research

April 1999 - Present

Institute of Art, Design and Technology (IADT)
Kill Avenue, Dun Laoghaire, Co. Dublin:

Post: Lecturer II in Electronics, Programme co-ordinator for B.Eng. in Digital Media Systems and Higher National Certificate in Engineering

Department of Microelectronic Engineering, Trinity College Dublin
Post: Visiting Lecturer, Research associate

Silicon and Software Systems,
Clonskeagh, Dublin 14:
Post: Silicon Systems Designer (sabbatical position)

Department of Electronic and Communications Engineering
Dublin Institute of Technology:
Post: Lecturer II in Electronics

Department of Electronics, Institute of Technology, Carlow
Post: Lecturer I in Electronics

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Publications

P.A. Comiskey and J.B. Foley, “CMOS Power Estimation Using Markov Chains”, Integration, the VLSI Journal, published by Elsevier, submitted May 2006.

P.A. Comiskey and A.Th. Schwarzbacher, "Data driven low level power estimation in memory modules," 5th Electronic Circuits and Systems Conference, Bratislava, Slovakia, pp. 69-72, September 2005.

Falko Gittel, A. Th. Schwarzbacher, P.A. Comiskey and J.T. Timoney, "Performance improved CMOS implementation of an adaptive noise canceller," 5th Electronic Circuits and Systems Conference, Bratislava, Slovakia, pp. 95-98, September 2005.

P.A. Comiskey, A.Th. Schwarzbacher and J.B. Foley, "LLAMA: a monte carlo power estimation tool," Irish Systems and Signals Conference, Belfast, Northern Ireland, pp. 685-690, July 2004.

P.A. Comiskey, A.Th. Schwarzbacher and J.B. Foley, "Power estimation with a markov model," 4th Electronic Circuits and Systems Conference, Bratislava, Slovakia, pp. 34-36, September 2003.

P.A. Comiskey, A.Th. Schwarzbacher, J.B. Foley, "High level markov power estimation," Irish Systems and Signals Conference, Limerick, Ireland, pp. 248-253, July 2003.

P.A. Comiskey and A.Th. Schwarzbacher "LLAMA: a circuit level power estimation tool," Electronic Devices and Systems Conference, Bruno, Czech Republic, pp. 177-182, September 2002.

A.Th. Schwarzbacher, P.A. Comiskey and J.B. Foley, "Low-Power CMOS implementation of an image processing algorithm," Irish Machine Vision and Image Processing Conference, Maynooth, Ireland, p. 257, September 2001.

A.Th. Schwarzbacher, P.A. Comiskey, J.B. Foley, J. Rodrigoues and F. Klemenz, "Rapid estimation of the active node capacitance of VLSI circuits," Programmable Devices and Systems 2000, Ostrava, Czech Republic, pp. 85-88, February 2000.

P.A. Comiskey and A.Th. Schwarzbacher, "Classification of Uniform White Noise Sources using the Spectral Test," Flying High - Magazine for Supercomputing, No. 15, Spring 1999.

A.Th. Schwarzbacher and P.A. Comiskey, "Power estimation at the higher levels of integrated circuit design" Irish Scientist, p. 112, Year Book 1999.

A.Th. Schwarzbacher, P.A. Comiskey and J.B. Foley, "Improving the power consumption in image processing algorithms," UK Low Power Forum, Sheffield, UK, pp. 4.1–4.5, September 1998.

A.Th. Schwarzbacher, P.A. Comiskey, J. Neves Rodrigoues and J.B. Foley, "Design of integrated circuits for the power domain," First International Postgraduate Research Conference, Dublin, Ireland, November 1998.

P.A. Comiskey, A.Th. Schwarzbacher and J.B. Foley, "Random binary vector generation and analysis using genetic optimisation," Irish Systems and Signals Conference, Dublin, Ireland, pp. 519-525 June 1998.

P.A. Comiskey, A.Th. Schwarzbacher and J.B. Foley, "The effect of input lattice structure in image processing algorithm," UK Low Power Forum, Sheffield, Untied Kingdom, pp. 11.1–11.6, September 1998.

A.Th. Schwarzbacher, P.A. Comiskey and J.B. Foley, "High level power estimation powercount," Irish Systems and Signals Conference, Dublin, Ireland, pp. 101-108, June 1998.

P.A. Comiskey, A.Th. Schwarzbacher and J.B. Foley, "Power estimation in CMOS circuits using genetically optimised input patterns," Electronic Systems and Devices Conference, Bruno, Czech Republic, pp. 1-4, June 1998.

A.Th. Schwarzbacher, P.A. Comiskey and J.B. Foley, "Reduction of the power consumption at the algorithmic level of CMOS circuits," Electronic Systems and Devices Conference, Bruno, Czech Republic, pp. 5-8, June 1998.

A.Th. Schwarzbacher, P.A. Comiskey and J.B. Foley, "Powercount: measuring the power at the VHDL netlist level," Electronic Systems and Devices Conference, Bruno, Czech Republic, pp. 70-73, June 1998.

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